Bio Demonstrator
The Bio demonstrator is the Si-PIC validation module, designed to showcase integration of photonic and electronic components on a glass interposer. The interposer features through-glass vias (TGVs) and redistribution layers (RDLs) to fan out the Si-PIC’s electrical I/Os to a JEDEC-compliant ball grid array (BGA) footprint. The package includes ~1300 solder balls, with ~110 pads for active electrical connections and the rest for thermo-mechanical stability. This standardized BGA interface enables integration into sockets or system boards for testing and operation.
Optically, the demonstrator uses a hybrid laser-to-Si-PIC scheme within a micro-structured cavity. A laser diode on a subassembly with integrated isolator and microlens collimates the beam, which is then focuses into the Si-PIC’s input coupler. On the PIC’s backside, a 2D microlens array aligns with the grating coupler outputs to collimate beams into free space, supporting LDV sensing. The assembly is sealed with an AR-coated glass lid and spacer frame to protect the optics while maintaining optical I/Os.
Optically, the demonstrator uses a hybrid laser-to-Si-PIC scheme within a micro-structured cavity. A laser diode on a subassembly with integrated isolator and microlens collimates the beam, which is then focuses into the Si-PIC’s input coupler. On the PIC’s backside, a 2D microlens array aligns with the grating coupler outputs to collimate beams into free space, supporting LDV sensing. The assembly is sealed with an AR-coated glass lid and spacer frame to protect the optics while maintaining optical I/Os.
Communications Demonstrator
The InP-PIC validation demonstrator was designed to showcase a packaging-ready transmitter module with integrated active photonic components. Unlike the Si-PIC demonstrator, which relied on external hybrid laser integration, the InP demonstrator incorporates native active devices directly on the chip, including distributed feedback (DFB) lasers, and Mach–Zehnder Modulators (MZMs). These devices are designed to operate at data rates up to 25–50 Gb/s per channel, forming the basis of a four-channel optical transmitter. The packaged assembly is built on a glass interposer with through-glass vias (TGVs) and redistribution layers (RDLs) to route both DC and RF signals to a JEDEC-compliant BGA footprint, enabling seamless socket or board integration. The optical design featured a custom optic for vertically coupling the light, enabling a pluggable package design.
Glass Interposer Wafer Designs
As part of its technology development strategy, Photonic LEAP employed a two-phase process to optimize the design of the complex glass interposer structures, forming the foundation of its innovative BGA surface-mount package.
Phase 1: Reference Interposer Run – first test or ‘reference’ interposers for packaging process development. The reference run establish the baseline layouts, building blocks, and integration strategies required for the PhotonicLEAP demonstrators. These reference designs served as the foundation for validating the Process Design Kit (PDK) rules, and for preparing the subsequent fabrication and assembly activities.
Phase 2: Demo Interposer Run – final process run to produce the glass interposer required for the full project demonstrators. This wafer was itself a demonstration of a multi-project wafer – this glass platform allows for multiple designs to be populated on the same wafer, allowing for projects share the cost of the wafer run, reducing the access cost of this technology.
Phase 1: Reference Interposer Run – first test or ‘reference’ interposers for packaging process development. The reference run establish the baseline layouts, building blocks, and integration strategies required for the PhotonicLEAP demonstrators. These reference designs served as the foundation for validating the Process Design Kit (PDK) rules, and for preparing the subsequent fabrication and assembly activities.
Phase 2: Demo Interposer Run – final process run to produce the glass interposer required for the full project demonstrators. This wafer was itself a demonstration of a multi-project wafer – this glass platform allows for multiple designs to be populated on the same wafer, allowing for projects share the cost of the wafer run, reducing the access cost of this technology.
200mm Reference Glass Wafer
Flipchip on Glass Interposer
With the support from ficonTEC as equipment suppliers, a flexible, fully automated, flip-chip laser reflow process for attaching the Si and InP PICs was developed. An 808 nm beam heats components from above, rapidly soldering the components in place.
This project has received funding from the European Union’s Horizon 2020 research and innovation program Grant Agreement N°101016738, in Public Private Partnership with Photonics 21 (www.photonics21.org) Copyright © 2021 PhotonicLEAP All rights reserved
This project has received funding from the European Union’s Horizon 2020 research and innovation program Grant Agreement N°101016738, in Public Private Partnership with Photonics 21 (www.photonics21.org) Copyright © 2021 PhotonicLEAP All rights reserved